In massive Multiple-Input Multiple-Output （MIMO） systems， Minimum Mean Square Error （MMSE） detection algorithm has the problems of poor adaptability， high computational complexity and low efficiency on the reconfigurable array structure. Based on the reconfigurable array processor developed by the project team， a parallel mapping method based on MMSE algorithm was proposed. Firstly， a pipeline acceleration scheme which could be highly parallel in time and space was designed based on the relatively simple data dependency of Gram matrix calculation. Secondly， according to the relatively independent characteristic of Gram matrix calculation and matched filter calculation module in MMSE algorithm， a modular parallel mapping scheme was designed. Finally， the mapping scheme was implemented based on Xilinx Virtex-6 development board， and the statistics of its performance were performed. Experimental results show that， the proposed method achieves the acceleration ratio of 2.80， 4.04 and 5.57 in Quadrature Phase Shift Keying （QPSK） uplink with the MIMO scale of \mathrm{128} \times \mathrm{4} ， \mathrm{128} \times \mathrm{8} and \mathrm{128} \times \mathrm{16} ， respectively， and the reconfigurable array processor reduces the resource consumption by 42.6% compared with the dedicated hardware in the \mathrm{128} \times \mathrm{16} massive MIMO system.

Rate-Distortion （R-D） optimization is a crucial technique in video encoders. However， the widely used independent R-D optimization is far from being global optimal. In order to further improve the compression performance of High Efficiency Video Coding （HEVC）， a two-pass encoding algorithm combined with both R-D dependency and R-D characteristic was proposed. Firstly， the current frame was encoded with the original method in HEVC， and the number of bits consumed by the current frame and the R-D model parameters of each Coding Tree Unit （CTU） were obtained. Then， combined with time domain dependent rate distortion optimization， the optimal Lagrange multiplier and quantization parameter for each CTU were determined according to the information including current frame bit budget and R-D model parameters. Finally， the current frame was re-encoded， where each CTU had different optimization goal according to its Lagrange multiplier. Experimental results show that the proposed algorithm achieves significant rate-distortion performance improvement. Specifically， the proposed algorithm saves 3.5% and 3.8% bitrate at the same coding quality， compared with the original HEVC encoder， under the coding configurations of low-delay B and P frames.